A novel ternary content addressable memory design based on resistive random access memory with high intensity and low search energy

被引:3
作者
Han, Runze [1 ]
Shen, Wensheng [1 ]
Huang, Peng [1 ]
Zhou, Zheng [1 ]
Liu, Lifeng [1 ]
Liu, Xiaoyan [1 ]
Kang, Jinfeng [1 ]
机构
[1] Peking Univ, Inst Microelect, Beijing 100871, Peoples R China
关键词
ARCHITECTURE; LOOKUP; MODEL; CAM;
D O I
10.7567/JJAP.57.04FE02
中图分类号
O59 [应用物理学];
学科分类号
摘要
A novel ternary content addressable memory (TCAM) design based on resistive random access memory (RRAM) is presented. Each TCAM cell consists of two parallel RRAM to both store and search for ternary data. The cell size of the proposed design is 8F(2), enable a similar to 60x cell area reduction compared with the conventional static random access memory (SRAM) based implementation. Simulation results also show that the search delay and energy consumption of the proposed design at the 64-bit word search are 2 ps and 0.18 fJ/bit/search respectively at 22 nm technology node, where significant improvements are achieved compared to previous works. The desired characteristics of RRAM for implementation of the high performance TCAM search chip are also discussed. (c) 2018 The Japan Society of Applied Physics.
引用
收藏
页数:5
相关论文
共 32 条
  • [1] Anat B.-B., 2011, IEEE T COMPUT, V61, P1
  • [2] Highly scalable non-volatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses
    Baek, IG
    Lee, MS
    Seo, S
    Lee, MJ
    Seo, DH
    Suh, DS
    Park, JC
    Park, SO
    Kim, HS
    Yoo, IK
    Chung, UI
    Moon, JT
    [J]. IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, 2004, : 587 - 590
  • [3] Chang M., 2017, ISSCC, P318
  • [4] A Comprehensive Crossbar Array Model With Solutions for Line Resistance and Nonlinear Device Characteristics
    Chen, An
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (04) : 1318 - 1326
  • [5] Chen Y. S., 2008, IEDM, P105
  • [6] CONTENT-ADDRESSABLE AND ASSOCIATIVE MEMORY - ALTERNATIVES TO THE UBIQUITOUS RAM
    CHISVIN, L
    DUCKWORTH, RJ
    [J]. COMPUTER, 1989, 22 (07) : 51 - 63
  • [7] Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines
    Eshraghian, Kamran
    Cho, Kyoung-Rok
    Kavehei, Omid
    Kang, Soon-Ku
    Abbott, Derek
    Kang, Sung-Mo Steve
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 19 (08) : 1407 - 1417
  • [8] Han R., 2017, INT C SOL STAT DEV M, P43
  • [9] Demonstration of Logic Operations in High-Performance RRAM Crossbar Array Fabricated by Atomic Layer Deposition Technique
    Han, Runze
    Huang, Peng
    Zhao, Yudi
    Chen, Zhe
    Liu, Lifeng
    Liu, Xiaoyan
    Kang, Jinfeng
    [J]. NANOSCALE RESEARCH LETTERS, 2017, 12
  • [10] A 250-MHz 18-Mb Full Ternary CAM With Low-Voltage Matchline Sensing Scheme in 65-nm CMOS
    Hayashi, Isamu
    Amano, Teruhiko
    Watanabe, Naoya
    Yano, Yuji
    Kuroda, Yasuto
    Shirata, Masaya
    Dosaka, Katsumi
    Nii, Koji
    Noda, Hideyuki
    Kawai, Hiroyuki
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2013, 48 (11) : 2671 - 2680