Deep Trench Capacitors in Silicon Interconnect Fabric

被引：12

作者：

Kannan, K. T. ^{[1
]}

Iyer, Subramanian S. ^{[1
]}

机构：

[1] Univ Calif Los Angeles, Dept Elect & Comp Engn, CHIPS, Los Angeles, CA 90025 USA

来源：

2020 IEEE 70TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2020) | 2020年

关键词：

Si-IF; decaps; deep trench capacitors; power delivery network; impedance spectrum; DECOUPLING CAPACITORS;

D O I：

10.1109/ECTC32862.2020.00358

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Silicon interconnect fabric (Si-IF) technology is a PCB replacement, fine pitch heterogeneous integration platform that enables high package density by supporting dielet assembly at small inter-dielet spacing. Electrical analysis of a back-side power delivery architecture for Si-IF is performed in this paper. To extend the frequency range of operation of the power delivery network (PDN), decoupling capacitors need to be used, which are implemented in Si-IF as deep trench capacitors (DTCAPs). DTCAPs with high specific cap density greater than fF/mu m(2), low effective series resistance (<= 1 m Omega), break down voltage greater than typical operating voltage, and process flow compatible for integration in Si-IF is targeted. Fabrication and experimental characterization of DTCAPs in Si-IF is currently a work in progress. Some early fabrication results are presented.

引用

页码：2295 / 2301

页数：7

共 16 条

[1]

Ambhore P., 2019, 2019 IEEE 69 EL COMP

[2]

[Anonymous], 2006, THESIS STATE U NEW Y

[3] Heterogeneous Integration at Fine Pitch (≤ 10 μm) using Thermal Compression Bonding [J].

Bajwa, Adeel A. ;

Jangam, SivaChandra ;

Pal, Saptadeep ;

Marathe, Niteesh ;

Bai, Tingyu ;

Fukushima, Takafumi ;

Goorsky, Mark ;

Iyer, Subramanian S. .

2017 IEEE 67TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2017), 2017, :1276-1284

[4]

Iyer S. S., 2006, IEEE T COMP PACK MAN, V6, P973

[5] Electrical Characterization of High Performance Fine Pitch Interconnects in Silicon-Interconnect Fabric [J].

Jangam, SivaChandra ;

Bajwa, Adeel ;

Thankappan, Kannan K. ;

Kittur, Premsagar ;

Iyer, Subramanian S. .

2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018), 2018, :1283-1288

[6] Cool chips: Opportunities and implications for power and thermal management [J].

Lin, Sheng-Chih ;

Banerjee, Kaustav .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (01) :245-255

[7] Process Development of Power Delivery Through Wafer Vias for Silicon Interconnect Fabric [J].

Liu, Meng-Hsiang ;

Vaisband, Boris ;

Hanna, Amir ;

Luo, Yandong ;

Wan, Zhe ;

Iyer, Subramanian S. .

2019 IEEE 69TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2019, :579-586

[8] Decoupling capacitors for multi-voltage power distribution systems [J].

Popovich, M ;

Friedman, EG .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2006, 14 (03) :217-228

[9] Effective radii of on-chip decoupling capacitors [J].

Popovich, Mikhail ;

Sotman, Michael ;

Kolodny, Avinoam ;

Friedman, Eby G. .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (07) :894-907

[10] Efficient Distributed On-Chip Decoupling Capacitors for Nanoscale ICs [J].

Popovich, Mikhail ;

Friedman, Eby G. ;

Secareanu, Radu M. ;

Hartin, Olin L. .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (12) :1717-1721

← 1 2 →