An Energy Efficient 1 Gb/s On-Chip Opto-electronic Transceiver Link using Monolithically-Integrated CMOS plus III-V LEDs

被引:0
|
作者
Balachandran, Arya [1 ,2 ]
Peh, Li-Shiuan [3 ]
Boon, Chirn Chye [1 ]
机构
[1] Nanyang Technol Univ, Singapore, Singapore
[2] SMART LEES, Singapore, Singapore
[3] Natl Univ Singapore, Singapore, Singapore
来源
2017 OPTO-ELECTRONICS AND COMMUNICATIONS CONFERENCE (OECC) AND PHOTONICS GLOBAL CONFERENCE (PGC) | 2017年
关键词
opto-electronic; CMOS; 1; Gb/s; network-on-chip (NoC); monolithic-integration; optical interconnects; photonic transceiver;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
As the data rate increases, the multicore and ultrafast processors require high speed interconnects that enable individual processors to allow fast access to memory, other cores and I/O devices. Optical interconnects are seen as potential solution to the limitations faced by electrical interconnects, viz. ringing, signal latency, crosstalk and frequency dependent attenuation. Using LASERS as optical source is highly unsuitable for on-chip networks due to the power-hungry requirements of the light source, even when the optical link is sparsely used. To address the growing demand for power-efficient on-chip communication, we propose a III-V and Si monolithic integrated opto-electronic transceiver which is directly compatible with CMOS process. The design uses mu-LEDs to replace LASER as the light source. Post layout results show that the design works successfully at a datarate of 1 Gb/s. The Energy/bit measured is around 450fJ/bit when operating at 1 Gb/s. The core area is 100umx40um for the integrated design.
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页数:3
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