Enhanced Fault Ride-Through of Power Converters Using Hybrid Grid Synchronization

被引:12
作者
Sahoo, Animesh [1 ]
Ravishankar, Jayashri [1 ]
Ciobotaru, Mihai [2 ]
Blaabjerg, Frede [3 ]
机构
[1] Univ New South Wales, Sch Elect Engn & Telecommun, Sydney, NSW 2052, Australia
[2] Macquarie Univ, Sch Engn, Sydney, NSW 2109, Australia
[3] Aalborg Univ, Dept Energy Technol, DK-9220 Aalborg, Denmark
关键词
Synchronization; Phase locked loops; Power system stability; Frequency estimation; Impedance; Estimation; Feedforward systems; Fault ride-through (FRT); grid faults; hybrid grid synchronization; phase-angle jumps (PA[!text type='Js']Js[!/text]); phase-locked loop (PLL); voltage source converters (VSCs); LOCKED LOOP; PLL;
D O I
10.1109/JESTPE.2021.3054851
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Inaccurate phase-angle jump (PAJ) estimation of the grid voltage during faults is one of the major causes for poor fault ride-through (FRT) performance of converters. To overcome this issue and make the converter's current controller robust, this article proposes a hybrid grid synchronization transition technique. In this concept, a synchronous reference frame-based phase-locked loop (SRFPLL) grid synchronization method is used during normal grid operation and switched to an arctangent-based phase-angle estimation during grid faults. Simultaneously frequency estimation is switched to the arctangent derived frequency. A common transition method, which depends on the phase-angle error between the two-phase estimation techniques, is proposed to ensure a smooth transition between the hybrid phase-angle and frequencies. The transition technique is implemented using the current control of a three-phase voltage source converter in the SRF. The performance of the converter during both symmetrical and asymmetrical grid faults along with the FRT strategies is tested using real-time experiments. It is observed that the transition-based hybrid grid synchronization technique reduces the loss of synchronism duration. Additionally, it offers a more robust converter current control performance compared to the SRFPLL technique over a wide range of voltage sags and PAJs.
引用
收藏
页码:2829 / 2841
页数:13
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