Reliability-aware design for programmable QCA logic with scalable clocking circuit

被引:12
作者
Sen, Bibhash [1 ]
Chowdhury, Mayukh R. [1 ]
Mukherjee, Rijoy [1 ]
Goswami, Mrinal [1 ]
Sikdar, Biplab K. [2 ]
机构
[1] Natl Inst Technol, Dept Comp Sci & Engn, Durgapur 713209, W Bengal, India
[2] IIEST Shibpur, Dept Comp Sci & Technol, Howrah, W Bengal, India
关键词
Quantum dot cellular automata (QCA); QCA defects; Programmable architecture; Fault tolerance; Reliability; Clocking; DOT CELLULAR-AUTOMATA; ADDER DESIGNS; QUANTUM; DEFECTS; ARCHITECTURES; DEVICE; GATE;
D O I
10.1007/s10825-017-0973-z
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The limitations of complementary metal-oxide-semiconductor (CMOS) technology on the nanoscale will prevent continuation of the current scaling trends in very large-scale integration (VLSI). Quantum-dot cellular automata (QCA) are one of the emerging nanotechnologies, conceived as a viable alternative to CMOS circuits, offering exceptionally high integration density, impressive switching frequency, and remarkably low power characteristics. However, fabrication issues and susceptibility to high error rates have raised many questions regarding this technology, leading to the search for efficient and scalable methods for design of QCA circuits. In this regard, this work targets a generic, reliable and programmable (RP) architecture for QCA with hybrid cell orientation. An efficient, easily manufacturable, and scalable clocking scheme is proposed towards the design of fault-tolerant QCA architectures. The functionality and defect tolerance of a five-input majority voter with RP structure (RMV) are investigated under cell deposition defects. Simulation results demonstrate that the proposed RP structure is more reliable than the conventional design. Besides reliability, the most striking characteristic of this logic is that it is completely programmable to perform various logic functions, reducing the requirement for disparate logic for large circuits. Comprehensive analysis of its programmable feature is applied to achieve a full adder, which extends its reliability to circuit level. The design of the QCA layout, as well as functional verification of the proposed design, is performed using QCADesigner.
引用
收藏
页码:473 / 485
页数:13
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