Research on algorithm in fast modular exponentiation based on FPGA

被引：0

作者：

Zhao, Lianqing ^{[1
]}

Li, Shu ^{[1
]}

Chen, Yuanxun ^{[1
]}

Liu, Dongjun ^{[1
]}

机构：

[1] North China Elect Power Univ, Dept Elect & Elect Engn, Beijing 102266, Peoples R China

来源：

ADVANCES IN MECHATRONICS AND CONTROL ENGINEERING II, PTS 1-3 | 2013年 / 433-435卷

关键词：

modular exponentiation on large number; Montgomery modular multiplication; public-key cryptography; systolic array; FPGA;

D O I：

10.4028/www.scientific.net/AMM.433-435.499

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Modular exponentiation for large number is widely applied in public-key cryptosystem, also is the bottleneck in the computation of public-key algorithm. Modular multiplication is the key calculation in modular exponentiation. An improved Montgomery algorithm is utilized to achieve modular multiplication and converted into systolic array to increase the running frequency. A high efficiency fast modular exponentiation structure is developed on FPGA to bring the best out of the modular multiplication module and enhance the ability of defending timing attacks and power attacks. For 1024 bit key operands, the design can be run at 170MHz and finish a modular exponentiation in 4402374 clock cycles.

引用

页码：499 / 502

页数：4