Double-layer channel structure based ZnO thin-film transistor grown by atomic layer deposition

A double channel structure has been used by depositing a thin amorphous-AlZnO (a-AZO) layer grown by atomic layer deposition between a ZnO channel and a gate dielectric to enhance the electrical stability. The effect of the a-AZO layer on the electrical stability of a-AZO/ZnO thin-film transistors (TFTs) has been investigated under positive gate bias and temperature stress test. The use of the a-AZO layer with 5 nm thickness resulted in enhanced subthreshold swing and decreased V-th shift under positive gate bias/temperature stress. In addition, the falling rate of the oxide TFT using a-AZO/ ZnO double channel had a larger value (0.35 eV/V) than that of pure ZnO TFT (0.24 eV/V). These results suggest that the interface trap density between dielectric and channel was reduced by inserting a-AZO layer at the interface between the channel and the gate insulator, compared with pure ZnO channel. ((c) 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)