CARRIER-BASED PWM TECHNIQUE APPLIED TO SINGLE-PHASE ASYMMETRIC NPC INVERTERS WITH THREE LEVELS ON INPUT AND SEVEN ON OUTPUT, USING FPGA

被引:0
作者
de Oliveira, Francisco H. [1 ]
de Freitas, Isaac S. [1 ]
Cardoso, Ronnan de B. [1 ]
Gomes, Zariff M. [1 ]
机构
[1] Univ Fed Paraiba, Joao Pessoa, Paraiba, Brazil
来源
2017 XIV BRAZILIAN POWER ELECTRONICS CONFERENCE (COBEP) | 2017年
关键词
Asymmetric Multilevel Inverter; Field Programmable Gate Array; Neutral Point Clamped; Pulse Width Modulation; Total Harmonic Distortion;
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
This paper presents a carrier-based pulse width modulation (PWM) technique applied to three-level NPC single-phase asymmetric multilevel inverter. The PWM technique along with the asymmetrical dc voltage condition allows for seven levels on the output AC voltage, providing two levels more than the equivalent symmetrical single phase inverter. Therefore, the Total Harmonic Distortion (THD) of the output voltage is highly reduced. To verify the proposed PWM strategy, simulations were performed and an experimental prototype was implemented, using a Field Programmable Gate Array device (FPGA) for the PWM modulator. The simulation and experimental results demonstrate the effectiveness of the modulation strategy.
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页数:6
相关论文
共 9 条
[1]   Medium-Voltage Multilevel Converters-State of the Art, Challenges, and Requirements in Industrial Applications [J].
Abu-Rub, Haitham ;
Holtz, Joachim ;
Rodriguez, Jose ;
Ge Baoming .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2010, 57 (08) :2581-2596
[2]   Voltage-Sharing Converter to Supply Single-Phase Asymmetrical Four-Level Diode-Clamped Inverter With High Power Factor Loads [J].
Boora, Arash A. ;
Nami, Alireza ;
Zare, Firuz ;
Ghosh, Arindam ;
Blaabjerg, Frede .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2010, 25 (10) :2507-2520
[3]   A Carrier-Based PWM Technique for Capacitor Voltage Balancing of Single-Phase Three-Level Neutral-Point-Clamped Converters [J].
de Freitas, Isaac Soares ;
Bandeira, Marcos Moura ;
Barros, Luciano de Macedo ;
Jacobina, Cursino Brandao ;
dos Santos, Euzeli Cipriano ;
Salvadori, Fabiano ;
da Silva, Simplicio Arnaud .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2015, 51 (04) :3227-3235
[4]  
dos Santos Euzeli C., 2012, ADV POWER ELECT CONV
[5]   Power Block Geometry Applied to the Building of Power Electronics Converters [J].
dos Santos, Euzeli Cipriano, Jr. ;
Cabral da Silva, Edison Roberto .
IEEE TRANSACTIONS ON EDUCATION, 2013, 56 (02) :191-198
[6]   The Age of Multilevel Converters Arrives [J].
Franquelo, Leopoldo G. ;
Rodriguez, Jose ;
Leon, Jose I. ;
Kouro, Samir ;
Portillo, Ramon ;
Prats, Maria M. .
IEEE INDUSTRIAL ELECTRONICS MAGAZINE, 2008, 2 (02) :28-39
[7]   Reduced PWM harmonic distortion for multilevel inverters operating over a wide modulation range [J].
McGrath, Brendan Peter ;
Holmes, Donald Grahame ;
Meynard, Thierry .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2006, 21 (04) :941-949
[8]   A NEW NEUTRAL-POINT-CLAMPED PWM INVERTER [J].
NABAE, A ;
TAKAHASHI, I ;
AKAGI, H .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 1981, 17 (05) :518-523
[9]   Multilevel Converters: An Enabling Technology for High-Power Applications [J].
Rodriguez, Jose ;
Franquelo, Leopoldo G. ;
Kouro, Samir ;
Leon, Jose I. ;
Portillo, Ramon ;
Martin Prats, M. ;
Perez, Marcelo A. .
PROCEEDINGS OF THE IEEE, 2009, 97 (11) :1786-1817