Process integration of Cu metallization and ultra low k (k=2.2)

被引：4

作者：

Cheng, C ^{[1
]}

Hsia, W ^{[1
]}

Pallinti, J ^{[1
]}

Neumann, S ^{[1
]}

Koh, J ^{[1
]}

Li, P ^{[1
]}

Zhu, M ^{[1
]}

Lu, M ^{[1
]}

Cui, H ^{[1
]}

Fujimoto, T ^{[1
]}

Catabay, B ^{[1
]}

Wright, P ^{[1
]}

机构：

[1] LSI Log Corp, Proc Technol Dept, Proc R&D, Santa Clara, CA 95054 USA

来源：

PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2002年

关键词：

D O I：

10.1109/IITC.2002.1014950

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The first process integration of Cu metallization and next generation CVD ultra lowk (Trikon Orion ULK, k=2.2) is presented. The current process condition for a 130nm node Cu/lowk (k=2.9) process is applied to Cu/ULK and found to be suitable without major modifications. The comparison of post CMP measurement (dishing, erosion, peeling, and scratch) show no significant variation between control (k=2.9) and ULK. The electrical data indicates the successful integration of Cu and ULK. The interconnect capacitance is expected to reduce 20% at 0.1mum technology node using the ULK film.

引用

页码：256 / 258

页数：3