High speed Bias Temperature Instability measurements on 20 nm RMG HKMG MOSFETs

被引：2

作者：

Chandra, Nishant ^{[1
]}

Chandrashekhar, Sandhya ^{[2
]}

Francis, Rick ^{[2
]}

Kerber, Andreas ^{[2
]}

Srinivasan, Purushothaman ^{[2
]}

Nigam, Tanya ^{[2
]}

机构：

[1] Arizona State Univ, Tempe, AZ 85004 USA

[2] Globalfoundries, Technol Reliabil Dev, Santa Clara, CA USA

来源：

SOLID-STATE ELECTRONICS | 2014年 / 101卷

关键词：

Bias Temperature Instability; Ultra-fast measurement; WGFMU; Recovery; EOL projection; INTERFACE-TRAP GENERATION; NBTI STRESS; P-MOSFETS; DEPENDENCE; DEGRADATION; COMPONENTS; RECOVERY;

D O I：

10.1016/j.sse.2014.06.032

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Negative Bias Temperature Instability (NBTI) occurs in p-channel MOSFETs when they are operated at high temperature and negative bias on the gate. NBTI phenomena exhibits recovery once the stress is removed from the device. It is mainly due to de-trapping of holes from the oxide and partial recovery of generated interface traps. This causes an underestimation of the actual degradation in V-T during typical stress-measure-stress cycle. In this work threshold voltage (V-T) degradation was measured with a minimum sense delay of 1 mu s, on p-channel MOSFETs fabricated using the sub-20 nm RMG HKMG technology. Based on this work, it is shown that using 1 mu s delay the existence of a fast recoverable component of BTI can be shown very effectively. The impact on end-of-life (EOL) projection is a function of the voltage acceleration/time exponent for the two different components and we confirmed that the 2 ms delay is still adequate for that purpose. (C) 2014 Elsevier Ltd. All rights reserved.

引用

页码：18 / 22

页数：5

共 18 条

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