Low power analog front-end electronics in deep submicrometer CMOS technology based on gain enhancement techniques

被引：1

作者：

Gomez-Galan, J. A. ^{[1
]}

Sanchez-Rodriguez, T. ^{[1
]}

Sanchez-Raya, M. ^{[1
]}

Martel, I. ^{[1
]}

Lopez-Martin, A. ^{[2
]}

Carvajal, R. G. ^{[3
]}

Ramirez-Angulo, J. ^{[4
]}

机构：

[1] Univ Huelva, Dpto Ingn Elect Sist Informat & Automat, Huelva, Spain

[2] Univ Publ Navarra, Dpto Ingn Elect & Elect, Navarra, Spain

[3] Univ Seville, Dpto Ingn Elect, Seville, Spain

[4] New Mexico State Univ, Klipsch Sch Elect Engn, Las Cruces, NM 88003 USA

来源：

NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT | 2014年 / 749卷

关键词：

Analog readout front-end; Gain boosting techniques; CMOS submicron technology; DETECTORS; CIRCUITS; VOLTAGE; DESIGN; NM;

D O I：

10.1016/j.nima.2014.02.044

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

This paper evaluates the design of front-end electronics in modern technologies to be used in a new generation of heavy ion detectors-HYDE (FAIR, Germany) proposing novel architectures to achieve high gain in a low voltage environment. As conventional topologies of operational amplifiers in modern CMOS processes show limitations in terms of gain, novel approaches must be raised. The work addresses the design using transistors with channel length of no more than double the feature size and a supply voltage as low as 1.2 V. A front-end system has been fabricated in a 90 nm process including gain boosting techniques based on regulated cascode circuits. The analog channel has been optimized to match a detector capacitance of 5 pF and exhibits a good performance in terms of gain, speed, linearity and power consumption. (C) 2014 Elsevier B.V. All rights reserved.

引用

页码：90 / 95

页数：6

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