Preventing boron penetration through 25-angstrom gate oxides with nitrogen implant in the Si substrates

被引:28
作者
Liu, CT
Ma, Y
Luftman, H
Hillenius, SJ
机构
[1] Bell Laboratories, Lucent Technologies, Murray Hill
关键词
D O I
10.1109/55.568768
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
For gate oxides thinner than 40 Angstrom, conventional schemes of incorporating N in the oxides might become insufficient in stopping B penetration, By implanting N into the Si substrates with a sacrificial oxide layer, we have grown 25 Angstrom gate oxide and prevented B penetration in the presence of F after 90 min of 850 degrees C and 10 s of 1050 degrees C anneals, SIMS analyses surprisingly reveal a N peak formed within the thin oxide layer, while no N is left in the Si substrate beyond the oxide layer, In addition, no]B is seen in the substrate, either, As a consequence, threshold voltage of pMOSFET's is shifted to a more negative value which agrees with calculations assuming no B penetration. Meanwhile, threshold voltage of nMOSFET's is not affected by the N implant, which confirms that B penetration is the only explanation for the pMOSFET data, Prevention of B peneitration also improves the short-channel effects for 0.25-mu m pMOSFET's, while Pro difference is seen in nMOSFET's with and without N implant.
引用
收藏
页码:212 / 214
页数:3
相关论文
共 8 条
[1]  
Fair RB, 1995, INTERNATIONAL ELECTRON DEVICES MEETING, 1995 - IEDM TECHNICAL DIGEST, P85, DOI 10.1109/IEDM.1995.497188
[2]  
Hasegawa E, 1995, INTERNATIONAL ELECTRON DEVICES MEETING, 1995 - IEDM TECHNICAL DIGEST, P327, DOI 10.1109/IEDM.1995.499207
[3]  
KRISCH KS, 1994, INTERNATIONAL ELECTRON DEVICES MEETING 1994 - IEDM TECHNICAL DIGEST, P325, DOI 10.1109/IEDM.1994.383402
[4]   High performance 0.2 mu m CMOS with 25 angstrom gate oxide grown on nitrogen implanted Si substrates [J].
Liu, CT ;
Lloyd, EJ ;
Ma, Y ;
Du, M ;
Opila, RL ;
Hillenius, SJ .
IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, :499-502
[5]   Light nitrogen implant for preparing thin-gate oxides [J].
Liu, CT ;
Ma, Y ;
Becerro, J ;
Nakahara, S ;
Eaglesham, DJ ;
Hillenius, SJ .
IEEE ELECTRON DEVICE LETTERS, 1997, 18 (03) :105-107
[6]  
LIU CT, 1997, DEV RES C
[7]  
LIU CT, 1996, VLSI S TECHN HON HI, P18
[8]  
Sung J. M., 1989, International Electron Devices Meeting 1989. Technical Digest (Cat. No.89CH2637-7), P447, DOI 10.1109/IEDM.1989.74318