Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channel

被引:39
作者
Burignat, S. [1 ]
Flandre, D. [2 ]
Arshad, M. K. Md [1 ]
Kilchytska, V. [2 ]
Andrieu, F. [3 ]
Faynot, O. [3 ]
Raskin, J. -P. [1 ]
机构
[1] Catholic Univ Louvain, Microwave Lab, B-1348 Louvain, Belgium
[2] Catholic Univ Louvain, Microelect Lab, B-1348 Louvain, Belgium
[3] CEA LETI MINATEC, F-38054 Grenoble, France
关键词
SOI MOSFET; UTB; Thin BOX; Subthreshold slope; Short channel effect; Substrate coupling; CMOS; DEVICES; INTEGRATION;
D O I
10.1016/j.sse.2009.12.021
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper aims at presenting a detailed and comprehensive study of the influence of space-charge condition at the substrate/BOX interface. as a function of the gate length and substrate bias. oil both the front threshold voltage (V-thr,) and subthreshold slope (S), for sub-32 nm Ultra-Thin Body (UTB) SOI MOSFETs with two different BOX thicknesses: either standard 145 mn (UTB) or thin 11.5 nm (UTB2). This Study details for the first time, the important impact of the substrate/BOX interface regime variations with gate length from 1 mu m clown to 25 nm, substrate bias and BOX thickness together, on the mean channel position into film and its related impact oil the electrical parameters V-thr and S Experimental results and conclusions are also completed and enlightened by ATLAS simulations and analytical modeling. (C) 2009 Elsevier Ltd. All rights reserved
引用
收藏
页码:213 / 219
页数:7
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