ACCELERATING CRITICAL SECTION EXECUTION WITH ASYMMETRIC MULTICORE ARCHITECTURES

被引:11
作者
Suleman, M. Aater [1 ]
Mutlu, Onur [2 ]
Qureshi, Moinuddin K. [3 ]
Patt, Yale N. [1 ]
机构
[1] Univ Texas Austin, Austin, TX 78712 USA
[2] Carnegie Mellon Univ, Pittsburgh, PA 15213 USA
[3] IBM Res Corp, Yorktown Hts, NY USA
关键词
CMP; Critical sections; Heterogeneous cores; Locks; Multicore; Parallel programming; Serialization;
D O I
10.1109/MM.2010.7
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Contention for critical sections can reduce performance and scalability by causing thread serialization. The proposed accelerated critical sections mechanism reduces this limitation acs executes critical sections on the high-performance core of an asymmetric chip multiprocessor (acmp), which can execute them faster than the smaller cores can.
引用
收藏
页码:60 / 70
页数:11
相关论文
共 18 条
[1]  
AMDAHL GM, 1967, FEDERATION INFORM PR, P483
[2]  
ANNAVARAM M, 2005, SIGARCH COMPUT ARCHI, V33, P298
[3]   IMPLEMENTING REMOTE PROCEDURE CALLS [J].
BIRRELL, AD ;
NELSON, BJ .
ACM TRANSACTIONS ON COMPUTER SYSTEMS, 1984, 2 (01) :39-59
[4]  
Culler D., 1998, Parallel Computer Architecture: A Hardware/software Approach
[5]  
HERLIHY M., 1993, P 20 ANN INT S COMPU, P289, DOI DOI 10.1145/165123.165164.URL
[6]   Amdahl's law in the multicore era [J].
Hill, Mark D. ;
Marty, Michael R. .
COMPUTER, 2008, 41 (07) :33-+
[7]  
Ipek Engin., 2007, PROC 34 ANN INT S CO, P186
[8]   Heterogeneous chip multiprocessors [J].
Kumar, R ;
Tullsen, DM ;
Jouppi, NP ;
Ranganathan, P .
COMPUTER, 2005, 38 (11) :32-+
[9]   BRANCH-AND-BOUND METHODS - A SURVEY [J].
LAWLER, EL ;
WOOD, DE .
OPERATIONS RESEARCH, 1966, 14 (04) :699-+
[10]  
Martinez-Miranda J., 2002, P 3 WORKSH AG BAS SI, P18