Hysteresis-free MoS2 metal semiconductor field-effect transistors with van der Waals Schottky junction

被引:12
作者
Wan, Da [1 ]
Wang, Qixia [1 ]
Huang, Hao [2 ]
Jiang, Bei [2 ]
Chen, Chen [1 ]
Yang, Zhenyu [3 ]
Li, Guoli [4 ]
Liu, Chuansheng [2 ]
Liu, Xingqiang [4 ]
Liao, Lei [4 ]
机构
[1] Wuhan Univ Sci & Technol, Sch Informat Sci & Engn, Wuhan 430081, Peoples R China
[2] Wuhan Univ, Sch Phys & Technol, Wuhan 430072, Peoples R China
[3] Qingdao Univ, Coll Microtechnol & Nanotechnol, Qingdao 266071, Peoples R China
[4] Hunan Univ, Sch Phys & Elect, Key Lab Micro Nano Optoelect Devices, Minist Educ, Changsha 410082, Peoples R China
基金
中国国家自然科学基金;
关键词
hysteresis; subthreshold swing; metal semiconductor field-effect transistor; van der Waals Schottky junction; THIN-FILM TRANSISTORS; MOBILITY;
D O I
10.1088/1361-6528/abd2e8
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Hysteresis-free and steep subthreshold swing (SS) are essential for low-power reliable electronics. Herein, MoS2 metal semiconductor field-effect transistors are fabricated with GeSe/MoS2 van der Waals Schottky junction as a local gate, in which the rectification behavior of the heterojunction offers the modulation of channel carriers. The trap-free gate interface enables the hysteresis-free characteristics of the transistors, and promises an ideal SS of 64 mV/dec at room temperature. All the devices operate with a low threshold voltage less than -1 V with desirable saturation behavior. An OR logic gate is constructed with the dual-gated MoS2 transistors by varying the back and top gate voltage. The strategy present here is promising for the design of low-power digital electronics based on 2D materials.
引用
收藏
页数:6
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