System-on-Chip FPGA-Based GNSS Receiver

被引:0
作者
Fridman, Alexander [1 ]
Semenov, Serguey [2 ]
机构
[1] NPO ENERGOMODULE, Moscow, Russia
[2] Moscow Inst Aviat Technol, Moscow, Russia
来源
PROCEEDINGS OF IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS 2013) | 2013年
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Modern FPGAs offer a cost-efficient alternative to ASICs, and provide the flexibility and scalability to respond rapidly to changing consumer requirements. Soft processor solution such as MicroBlaze makes it possible to integrate a multi-processor system on the single FPGA chip along with the bulk of logic circuitry. Generic FPGA-based architecture of the Global Navigation Satellite System (GNSS) receiver is presented, including a Multi-Processor System, a Multi-Channel Correlator, Fast Search Engine, etc. The generic design is easily reconfigurable for adaptation to various applications such as high-dynamic platforms, or a hard urban environment. Test results of high-dynamic modification of the GNSS receiver are presented, as well as drive test results of the low-cost GNSS receiver option in live hard urban environment are discussed.
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收藏
页数:7
相关论文
共 4 条
[1]  
Fridman A., 2009, P IEEE E W DES TEST
[2]  
Fridman A., 2006, Patent of Russian Federation, Patent No. 2341898
[3]  
Kaplan E., 2006, UNDERSTANDING GPS PR, P219
[4]  
Semenov S., 2005, THESIS