A Survey and Analysis on SoC Platform Security in ARM, Intel and RISC-V Architecture

被引:0
|
作者
Nicholas, Geraldine Shirley [1 ]
Gui, Yutian [1 ]
Saqib, Fareena [1 ]
机构
[1] Univ N Carolina, Dept Elect & Comp Engn, Charlotte, NC 28223 USA
关键词
RISC-V; ARM TrustZone; Intel SGX; Trusted Execution Environment (TEE); BOOT;
D O I
10.1109/mwscas48704.2020.9184573
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Modern heterogeneous computing including IoT devices and Networks deliver optimized and enhanced performance along with high speed but rely on an increased number of components to achieve the desired results. The design productivity for hardware accelerators with machine learning platforms for various application has significant progress on system-on-chip architectures. Most of these technologies provide the desired performance, however, there is always a tradeoff between security and performance. The major role in developing frameworks for hardware security attacks depends on the IP and system architecture. RISC-V provides a platform for custom implementation of security extensions when compared to other traditional architectures. This paper provides a brief survey of different hardware/ software security attacks and summarizes a comparison of security features in RISC-V and other traditional architectures along with security extensions that can be achieved by RISC-V.
引用
收藏
页码:718 / 721
页数:4
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