Dead-Time Elimination of PWM-Controlled Inverter/Converter Without Separate Power Sources for Current Polarity Detection Circuit

被引:149
作者
Lin, Yong-Kai [1 ]
Lai, Yen-Shin [1 ]
机构
[1] Natl Taipei Univ Technol, Taipei 10608, Taiwan
关键词
Dead-time elimination; pulsewidth modulation (PWM); COMPENSATION; STRATEGY;
D O I
10.1109/TIE.2009.2014305
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper will present a dead-time elimination scheme for a pulsewidth-modulation (PWM)-controlled inverter/converter. The presented dead-time elimination scheme does not require separated power supplies for freewheeling-current detection of high- and low-side power devices. The presented scheme includes the freewheeling-current polarity detection circuit and the PWM control generator without dead time. It will be shown that the presented scheme eliminates the dead time of PWM control for inverter/converter and therefore dramatically improves output voltage loss and current distortion. Experimental results derived from a field-programmable-gate-array-based PWM-controlled inverter are shown to demonstrate the effectiveness.
引用
收藏
页码:2121 / 2127
页数:7
相关论文
共 20 条
[1]   THD and power losses optimization by means of variable frequency space vector modulation [J].
Attaianese, C ;
Nardi, V ;
Tomasso, G .
2005 IEEE 36TH POWER ELECTRONIC SPECIALISTS CONFERENCE (PESC), VOLS 1-3, 2005, :962-968
[2]  
Attaianese C, 2005, IEEE T IND APPL, V41, P1667, DOI 10.1109/TIA.2005.957472
[3]   Predictive compensation of dead-time effects in VSI feeding induction motors [J].
Attaianese, C ;
Tomasso, G .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2001, 37 (03) :856-863
[4]  
ATTAIANESE C, 2002, P IEEE APEC, V1, P497
[6]   Broadband designs of coplanar capacitively-fed shorted patch antennas [J].
Chen, H. -D. .
IET MICROWAVES ANTENNAS & PROPAGATION, 2008, 2 (06) :574-579
[7]   A new switching strategy for pulse width modulation (PWM) power converters [J].
Cho, Kyu Min ;
Oh, Won Seok ;
Kim, Young Tae ;
Kim, Hee Jun .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2007, 54 (01) :330-337
[8]  
CHOI JS, 1999, IEEE IAS ANN M, V4, P2188
[9]   Inverter output voltage synthesis using novel dead time compensation [J].
Choi, JW ;
Sul, SK .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 1996, 11 (02) :221-227
[10]  
Cichowski A., 2005, IEEE Power Electronics Letters, V3, P72, DOI 10.1109/LPEL.2005.851310