Super compact RFIC inductors in 0.18μm CMOS with copper interconnects

被引：12

作者：

Feng, H ^{[1
]}

Jelodin, G ^{[1
]}

Gong, K ^{[1
]}

Zhan, R ^{[1
]}

Wu, Q ^{[1
]}

Chen, C ^{[1
]}

Wang, A ^{[1
]}

机构：

[1] IIT, Dept Elect & Comp Engn, Integrated Elect Lab, Chicago, IL 60616 USA

来源：

2002 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS | 2002年

关键词：

D O I：

10.1109/RFIC.2002.1012087

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Design of super compact on-chip inductors with deep-shrunk dimension of 22mumx23mum, as opposed to several hundreds gm by several hundreds gm, is reported. Implemented in a 6-metal all-copper 0.18mum CMOS process, a flat inductor value of 10nH up to 4GRz, satisfactory to many typical RFIC applications, is achieved. The aggressive shrinkage reduces parasitic capacitance substantially and makes it realistic and cost-effective to realize sing-chip RFICs in very deep sub-micron technologies. A new inductor model is proposed for accuracy. A 2/4GRz LNA circuit with on-chip matching using the compact inductor is demonstrated.

引用

页码：443 / 446

页数：4

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