Characterization of Phosphorus Implanted n+/p Junctions Integrated as Source/drain Regions in a 4H-SiC n-MOSFET

Phosphorous implanted n(+)/p diodes have been included in the masks for manufacturing n-MOSFET devices and processed in the same way of source/drain regions. the diode junctions were made by a P+ implantation at 300 degrees C and a post implantation annealing at 1300 degrees C. The diode emitter area was protected by 0.6 mu m thick CVD oxide during the processing of the MOSFET gate oxide. Three gate oxide processes were taken into account: two of them include a N implantation before a wet oxidation, while the third one was a standard oxidation. Considering the effect oil the n(+)/p diodes, the main difference among the processes were the wet thermal oxidation time that ranged between 180 and 480 min at a temperature of 1100 degrees C. The diode current-voltage characteristics show similar forward but different reverse curves ill the temperature range of 25-290 degrees C. Differences in reverse bias voltage as a function of the measurement temperature have been analyzed and are related to the different gate oxidation time. A correlation between the shortest oxidation time and the lower leakage current is presented.