POLSCA: Polyhedral High-Level Synthesis with Compiler Transformations

被引:3
作者
Zhao, Ruizhe [1 ]
Cheng, Jianyi [2 ]
Luk, Wayne [1 ]
Constantinides, George A. [2 ]
机构
[1] Imperial Coll London, Dept Comp, London, England
[2] Imperial Coll London, Dept Elect & Elect Engn, London, England
来源
2022 32ND INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, FPL | 2022年
基金
英国工程与自然科学研究理事会;
关键词
polyhedral model; high-level synthesis; compiler;
D O I
10.1109/FPL57034.2022.00044
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Polyhedral optimization can parallelize nested affine loops for high-level synthesis (HLS), but polyhedral tools are HLS-agnostic and can worsen performance. Moreover, HLS tools require user directives which can produce unreadable polyhedral-transformed code. To address these two challenges, we present POLSCA, a compiler framework that improves polyhedral HLS workflow by automatic code transformation. POLSCA decomposes a design before polyhedral optimization to balance code complexity and parallelism, while revising memory interfaces of polyhedral-transformed code to make partitioning explicit for HLS tools; it enables designs to benefit more easily from polyhedral optimization. Experiments on Polybench/C show that POLSCA designs are 1.5 times faster on average compared with baseline designs generated directly from applying HLS on C code.
引用
收藏
页码:235 / 242
页数:8
相关论文
共 20 条
  • [1] [Anonymous], 2014, FPGA
  • [2] [Anonymous], 2010, ICMS
  • [3] Bastoul C., 2012, TECH REP
  • [4] Bastoul C., 2004, PACT
  • [5] Bayliss S., 2014, POTHOLES POLYHEDRAL
  • [6] Bondhugula U., 2008, IPDPS, P1
  • [7] CONG J, 2018, ICCAD IEEE ACM INT, DOI DOI 10.1145/3240765.3240838
  • [8] Grosser T., 2015, TPLS
  • [9] Lattner C., 2014, CGO
  • [10] Lattner C., 2020, MLIR COMPILER INFRAS