A 1200x1200 8-Edges/Vertex FPGA-based Motion-Planning Accelerator for Dual-Arm-Robot Manipulation Systems

被引：0

作者：

Kosuge, Atsutake ^{[1
]}

Oshima, Takashi ^{[1
]}

机构：

[1] Hitachi Ltd, Res & Dev Grp, Tokyo, Japan

来源：

2020 IEEE SYMPOSIUM ON VLSI CIRCUITS | 2020年

关键词：

FPGA; accelerator; graph; A* and motion planning;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

An SoC-FPGA-based motion-planning accelerator operating on a graph with >10M edges is presented for the first time for dual-am-robot manipulation systems. The proposed modified A* algorithm with minimized memory access time, is further accelerated by extensive parallel computation and dynamic reconfigurations. The proposed accelerator has been verified by measurement result showing overall motion-planning time of 0.5 seconds, which is only 1/100 of the one by conventional algorithm on embedded CPU, while preserving accuracy.

引用

页数：2