Scalable GA processor architecture and its implementation of processor-element

被引:0
作者
Imai, T [1 ]
Yoshikawa, M [1 ]
Terai, H [1 ]
Yamauchi, H [1 ]
机构
[1] Ritsumeikan Univ, Grad Sch Sci & Engn, Shiga 5258577, Japan
来源
2002 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I-IV, PROCEEDINGS | 2002年
关键词
D O I
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中图分类号
O42 [声学];
学科分类号
070206 ; 082403 ;
摘要
Genetic Algorithm (GA) is widely known as a general-purpose optimization method, which can provide sub-optimum solutions for various optimization problems by means of modeling genetic evolutionary process of creatures. Several essential difficulties exist in GA, however, with regard to large amount of computation time, premature convergence in early stage of evolution and proper adjustment of many GA parameters. In order to overcome the difficulties of GA, this paper describes the architecture of a scalable and high-speed GA processor, which is characterized by hardware-oriented approach based on Distributed GA, optimized hierarchic pipelines for high-speed evolutions and flexible genetic operations corresponding to a given problem. Furthermore, this paper also describes VLSI implementation of a processor-element to verify feasibility of our proposed architecture for applications.
引用
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页码:3148 / 3151
页数:2
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