Synthesis of analog CMOS circuits

被引:0
|
作者
Shanker, KR
Vasudevan, V
机构
关键词
D O I
10.1109/ICVD.1997.568173
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper we describe an efficient method for transistor sizing in cell level analog circuits. An equation based method is used. SPICE quality device models are used and the sizing problem is posed as an optimisation problem. KCL, KVL and matching constraints are taken into account in the formulation of the optimisation problem without explicitly introducing them as constraints as was done previously. A tool developed based on th is method has been used to synthesise and study performance trade-offs in various CMOS op amps.
引用
收藏
页码:439 / 444
页数:6
相关论文
共 50 条
  • [21] Improving symbolic analysis in CMOS analog integrated circuits
    Aguila-Meza, J
    Torres-Papaqui, L
    Tlelo-Cuautle, E
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5, PROCEEDINGS, 2004, : 193 - 196
  • [22] Sizing low-voltage CMOS analog circuits
    Jespers, P. G. A.
    2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4, 2007, : 752 - 755
  • [23] On the Energy Efficiency of Analog Circuits in Nanoscale CMOS Technologies
    Ytterdal, Trond
    Wulff, Carsten
    2008 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, 2008, : 240 - 243
  • [24] IDAC - AN INTERACTIVE DESIGN TOOL FOR ANALOG CMOS CIRCUITS
    DEGRAUWE, MGR
    NYS, O
    DIJKSTRA, E
    RIJMENANTS, J
    BITZ, S
    GOFFART, BLA
    VITTOZ, EA
    CSERVENY, S
    MEIXENBERGER, C
    VANDERSTAPPEN, G
    OGUEY, HJ
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1987, 22 (06) : 1106 - 1116
  • [25] Hot carrier reliability simulation for CMOS analog circuits
    Pressecq, F
    Noullet, JL
    Bordonado, B
    EECC'97 - PROCEEDINGS OF THE THIRD ESA ELECTRONIC COMPONENTS CONFERENCE, 1997, 395 : 345 - 350
  • [26] Study and comparison of CMOS layouts for applications in analog circuits
    Lopez, Francisco
    Estrada, Johan
    Linares, Monico
    Zuniga, Carlos
    Soto, Blanca
    JOURNAL OF SCIENTIFIC & INDUSTRIAL RESEARCH, 2012, 71 (04): : 257 - 261
  • [27] DIGITAL CMOS CELL LIBRARY ADOPTS ANALOG CIRCUITS
    HAM, P
    NEWMAN, D
    ELECTRONIC DESIGN, 1983, 31 (25) : 107 - &
  • [28] Analog circuits in ultra-deep-submicron CMOS
    Annema, AJ
    Nauta, B
    van Langevelde, R
    Tuinhout, H
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (01) : 132 - 143
  • [29] ALGA: Automated layout generator for analog CMOS circuits
    Kao, C. -C.
    Hsu, C. -C.
    INTERNATIONAL JOURNAL OF ELECTRONICS, 2007, 94 (01) : 81 - 97
  • [30] ILAC - AN AUTOMATED LAYOUT TOOL FOR ANALOG CMOS CIRCUITS
    RIJMENANTS, J
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (02) : 417 - 425