A component architecture for FPGA-based, DSP system design

被引:2
作者
Spivey, G [1 ]
Bhattacharyya, SS [1 ]
Nakajima, K [1 ]
机构
[1] Univ Maryland, ECE Dept, College Pk, MD 20742 USA
来源
IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES, AND PROCESSORS, PROCEEDINGS | 2002年
关键词
D O I
10.1109/ASAP.2002.1030703
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Introducing FPGA components into DSP system implementations creates an assortment of challenges across system architecture and logic design. Recognizing that some of the greatest challenges occur in the integration of the various components, we have developed a component architecture and an associated set of software tools, collectively called the Logic Foundry. Using the Logic Foundry, an FPGA-based DSP system can be easily constructed from pre-built components and implemented on a variety of back-end FPGA platforms. The resulting implementation can then be encapsulated and integrated into a variety of front-end software application environments. This paper develops the component architecture and integration capabilities of the Logic Foundry, and examines a number of application case studies that we have experimented with using the Logic Foundry.
引用
收藏
页码:41 / 51
页数:11
相关论文
共 18 条
[11]   GRAPE-II - A SYSTEM-LEVEL PROTOTYPING ENVIRONMENT FOR DSP APPLICATIONS [J].
LAUWEREINS, R ;
ENGELS, M ;
ADE, M ;
PEPERSTRAETE, JA .
COMPUTER, 1995, 28 (02) :35-43
[12]  
NATARAJAN S, 1999, P 1999 MIL AER APPL, P101
[13]  
NEWMAN M, NEW SOLUTIONS RECONF
[14]  
*OXFORD HARDW COMP, 1997, HAND LANG TECHN REP
[15]  
PAUER E, 1998, P 2 ANN WORKSH HIGH, P264
[16]  
*RINC RES CORP, 2000, INTR MID 2K
[17]  
Sriram S., 2000, Embedded Multiprocessors: Scheduling and Synchronization
[18]  
2000, XILINX SYSTEM GENERA