Development of Advanced Fan-out Wafer Level Package

被引：1
作者：
Jin, Yonggang [1 ]
Teysseyre, Jerome [1 ]
Liu, Anandan Ramasamy Yun [1 ]
Huang, Bing Hong [1 ]
机构：
[1] STMicrolect Singapore, Dept CPA, Singapore, Singapore
来源：
CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE 2013 (CSTIC 2013) | 2013年 / 52卷 / 01期
关键词：
D O I：
10.1149/05201.0699ecst
中图分类号：
O646 [电化学、电解、磁化学];
学科分类号：
081704 ;
摘要：
Fan-out WLP is one of embedded package processed on wafer level, also a key advanced packages with higher number of I/Os, integration flexibilities. Furthermore, it enables to integrate multiple dies vertically and horizontally in one package without using substrates. Thus, recently Fan-out WLP technology is moving forward to next generation packages, such as multi-die, low profile package and 3D SiP. Not only the electronic packages, Fan-out WLP but also is used for sensor, power IC and LED packages This paper reports developments of next generation Fan-out WLP for advanced packaging solutions.
引用
收藏
页码：699 / 708
页数：10
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