Functional verification of the HP PA 8000 processor

被引：0

作者：

Mangelsdorf, ST

Gratias, RP

Blumberg, RM

Bhatia, R

机构：

来源：

HEWLETT-PACKARD JOURNAL | 1997年 / 48卷 / 04期

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The advanced microarchitecture of the HP PA 8000 CPU has many features that presented significant new verification challenges. These include out-of-order instruction execution, register renaming, speculative execution, four-way superscalar operation, decoupled instruction fetch, concurrent system bus interface, and PA-RISC 2.0 architecture enhancements. Enhanced functional verification tools and processes were required to address this microarchitectural complexity.

引用

页码：22 / 31

页数：10