A phase tracking system for three phase utility interface inverters

被引:847
|
作者
Chung, SK [1 ]
机构
[1] Gyeongsang Natl Univ, Ind Technol Res Inst, Dept Control & Instrumentat Engn, Kyungnam 660701, South Korea
关键词
phase-locked loop; utility interface;
D O I
10.1109/63.844502
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The analysis and design of the phase-locked loop (PLL) system is presented for the phase tracking system of the three phase utility interface inverters, The dynamic behavior of the closed loop PLL system is investigated in both continuous and discrete-time domains, and the optimization method is considered for the second order PLL system. In particular, the performance of the three phase PLL system is analyzed in the distorted utility conditions such as the phase unbalancing, harmonics, and offset caused by the nonlinear load conditions and measurement errors. The tracking errors under these distorted utility conditions are also derived. The phase tracking system is implemented in a digital manner using a digital signal processor (DSP) to verify the analytic results. The design considerations for the phase tracking system are deduced from the analytic and experimental results.
引用
收藏
页码:431 / 438
页数:8
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