A Low Power CMOS Voltage Controlled Oscillator in 65 nm Technology

被引：0

作者：

Sharma, A. ^{[1
]}

Saurabh ^{[1
]}

Biswas, S. ^{[1
]}

机构：

[1] LNM Inst Informat Technol, Elect & Commun Engn, Jaipur, Rajasthan, India

来源：

2014 INTERNATIONAL CONFERENCE ON COMPUTER COMMUNICATION AND INFORMATICS (ICCCI) | 2014年

关键词：

CMOS; ring oscillator; Current-starved VCO; phase shift; PHASE-NOISE; RING; FREQUENCY; DESIGN; JITTER; VCO;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Wireless device portability and power efficiency are the two major challenges in modern device modeling. Voltage Controlled Oscillator (VCO) is one the most essential circuit used in wireless systems. A new three stage VCO design in 65nm technology is proposed in this paper and is compared with previous best Current starved VCO design on the basis of on-chip area utilization and power consumption. The measured tuning range of the proposed VCO design is 0.83 to 3.77 GHz and it is around 30-33% energy efficient than the previous best design. The new proposed VCO design uses 67.65 mu m(2) area which is 40.75% less than the chip area required for the fabrication of current starved VCO design.

引用

页数：5

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