Step load response of a current-mode-controlled DC-to-DC converter

被引：45

作者：

Choi, B

机构：

[1] School of Electronic and Electrical Engineering, Kyungpook National University, Buk-Gu, Taegu

来源：

IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS | 1997年 / 33卷 / 04期

关键词：

D O I：

10.1109/7.624347

中图分类号：

V [航空、航天];

学科分类号：

08 ; 0825 ;

摘要：

This paper analyzes the step load response of a current-mode-controlled pulsewidth modulation (PWM) converter and also presents design guidelines for obtaining a good step load response. Analytical expressions for the step load response are derived in terms of the power stage and feedback compensation parameters. Control design to minimize the overshoot and settling time of the output voltage is presented. Analysis results are verified by large-signal simulations.

引用

页码：1115 / 1121

页数：7

共 5 条

[1]

Harada K., 1981, PESC'81. IEEE Power Electronics Specialists Conference, P388

[2]

Lee F. C., 1980, PESC '80 Record. IEEE Power Electronics Specialists Conference, P284

[3]

REDL R, 1980, P POW 7

[4] Analysis and interpretation of loop gains of multiloop-controlled switching regulators [J].