Single-phase 7-level inverter for reducing number of switches

被引:0
作者
Sato, Kosuke [1 ]
Haga, Hitoshi [1 ]
Kondo, Seiji [1 ]
机构
[1] Nagaoka Univ Technol, Dept Elect & Informat Engn, Nagaoka, Niigata, Japan
来源
2015 IEEE INTERNATIONAL TELECOMMUNICATIONS ENERGY CONFERENCE (INTELEC) | 2015年
关键词
component; DC-AC power converter; Multilevel inverter; transformerless inverter;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
this paper focuses on the circuit which is to reduce the number of switching elements in comparison to a common multi-level inverter NPC inverter. Increasing the number of levels of the output voltage at reduced circuit number switching elements, and performs waveform improvement. Typically, the ratio of the input voltage of the multi-level inverter is E-1 : E-2 = 1 : 1. When the ratio of the input voltage is 1 : 1, the number of the levels of the output voltage becomes only five-levels. Therefore, it increases the number of levels of the output voltage to a level seven by setting the ratio of the input voltage is E1 : E2= 1 : 2. It is subjected to waveform improvement by increasing the number of levels of output voltage. Reducing the number of switching elements is advantageous for downsizing of the cost of the surface and the circuit. The simulated and experimental results demonstrate the effectiveness of seven-level operation in 6-switches inverter. Furthermore, this paper confirms same loss characteristics of the proposed multi-level inverter compare to the conventional NPC inverter.
引用
收藏
页数:6
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