Single-Phase to Three-Phase Power Converter with Reduced DC-Link Voltage Ripple and Grid Current Harmonics

被引：0

作者：

Kumar, Anup ^{[1
]}

Aware, Mohan, V ^{[1
]}

Umre, B. S. ^{[1
]}

机构：

[1] Visvesvaraya Natl Inst Technol, Depaprtment Elect Engn, Nagpur, Maharashtra, India

来源：

2018 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES) | 2018年

关键词：

Active Front end converter (AFEC); Parallel five-leg (P5L); four-leg (4L); advanced bus clamping PWM (ABCPWM); conventional space vector PWM (CSVPWM);

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a single-phase to three-phase converter topologies with the DC link voltage ripple reduction and grid-side current quality improvement with proposed bus clamping pulsewidth modulation control. In this paper, performance of conventional five-leg (5L) converter, four-leg (41) converter and parallel five-leg (P5L) converter are compared. Conventionally, the active front-end converter with sinusoidal pulsewidth modulation (SPWM) scheme and space vector pulsewidth modulation (SVPWM) technique for inverter side control is adopted in such topologies. In these converters, the low frequency voltage oscillation across the de link capacitor is the inherent problem. It is proposed to use advanced bus clamping PWM (ABCPWM) technique for the load side inverter to reduce such ripples. This modulation technique minimizes the dc-link voltage oscillation and also improves the inverter output current and voltage profile in terms of reduced current and voltage THD. The grid current with reduced THD and unity power factor operation for conventional five-leg (5L) converter, four-leg (4L) converter and parallel five-leg (P5L) converter is also presented. The performance comparison of single-phase to three-phase power converter for these topologies with 300 ABCPWM control through simulation are presented.

引用

页数：6