Low-power issues for SoC

被引：0

作者：

Lazorenko, Dmytro I. ^{[1
]}

Chemeris, Alexander A. ^{[1
]}

机构：

[1] Inst Modeling Problems Power Engn, UA-03680 Kiev, Ukraine

来源：

2006 IEEE TENTH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS, PROCEEDINGS | 2006年

关键词：

low-power SoC; software optimizations for low-power SoC; memory;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Development of semiconductor technology has led to a concept of System-on-Chip (SoC). Complexity of modern applications and deep-submicron technologies make low power design attitude compulsory. The higher the level of abstraction of a design at which power optimizations are applied, the higher are potential savings. In this paper we present an overview of some of the design measures to reduce energy consumption of SoCs.

引用

页码：573 / +

页数：2

共 50 条

[31] Low-power linear computation using nonlinear ferroelectric tunnel junction memristors
Berdan, Radu
Marukame, Takao
Ota, Kensuke
Yamaguchi, Marina
Saitoh, Masumi
Fujii, Shosuke
Deguchi, Jun
Nishi, Yoshifumi
[J]. NATURE ELECTRONICS, 2020, 3 (05) : 259 - 266
[32] Content-Aware Low-Power Configurable Aging Mitigation for SRAM Memories
Shafique, Muhammad
Khan, Muhammad Usman Karim
Henkel, Joerg
[J]. IEEE TRANSACTIONS ON COMPUTERS, 2016, 65 (12) : 3617 - 3630
[33] Artificial Tactile Recognition Enabled by Flexible Low-Voltage Organic Transistors and Low-Power Synaptic Electronics
Wang, Xin
Lu, Wanlong
Wei, Peng
Qin, Zongze
Qiao, Nan
Qin, Xinsu
Zhang, Meng
Zhu, Yuanwei
Bu, Laju
Lu, Guanghao
[J]. ACS APPLIED MATERIALS & INTERFACES, 2022, : 48948 - 48959
[34] Visual growth of nano-HOFs for low-power memristive spiking neuromorphic system
Zhang, Cheng
Li, Yang
Yu, Fei
Wang, Guan
Wang, Kuaibing
Ma, Chunlan
Yang, Xinbo
Zhou, Ye
Zhang, Qichun
[J]. NANO ENERGY, 2023, 109
[35] Selective Scan Driver for Low-Power Consumption Using Oxide Thin Film Transistors
Jo, Jae-Hee
Jeong, Won-Been
Joung, Yu-Seong
Lee, Seung-Woo
[J]. IEEE ELECTRON DEVICE LETTERS, 2022, 43 (08) : 1263 - 1266
[36] Design and performance analysis of low-power SRAM based on electrostatically doped tunnel CNTFETs
Bala, Shashi
Khosla, Mamta
[J]. JOURNAL OF COMPUTATIONAL ELECTRONICS, 2019, 18 (03) : 856 - 863
[37] Low-Power and High-Performance Ternary SRAM Designs With Application to CNTFET Technology
Srinivasu, B.
Sridharan, K.
[J]. IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2021, 20 : 562 - 566
[38] Record Low-Power Organic RRAM With Sub-20-nA Reset Current
Bai, Wenliang
Huang, Ru
Cai, Yimao
Tang, Yu
Zhang, Xing
Wang, Yangyuan
[J]. IEEE ELECTRON DEVICE LETTERS, 2013, 34 (02) : 223 - 225
[39] High-speed low-power multiplexer-based selector for priority policy
Chiu, Jih-ching
Yang, Kai-ming
[J]. COMPUTERS & ELECTRICAL ENGINEERING, 2013, 39 (02) : 202 - 213
[40] Memristors based on multilayer graphene electrodes for implementing a low-power neuromorphic electronic synapse
Yan, Xiaobing
Cao, Gang
Wang, Jingjuan
Man, Menghua
Zhao, Jianhui
Zhou, Zhenyu
Wang, Hong
Pei, Yifei
Wang, Kaiyang
Gao, Chao
Lou, Jianzhong
Ren, Deliang
Lu, Chao
Chen, Jingsheng
[J]. JOURNAL OF MATERIALS CHEMISTRY C, 2020, 8 (14) : 4926 - 4933

← 1 2 3 4 5 →