Low-power issues for SoC

被引：0

作者：

Lazorenko, Dmytro I. ^{[1
]}

Chemeris, Alexander A. ^{[1
]}

机构：

[1] Inst Modeling Problems Power Engn, UA-03680 Kiev, Ukraine

来源：

2006 IEEE TENTH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS, PROCEEDINGS | 2006年

关键词：

low-power SoC; software optimizations for low-power SoC; memory;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Development of semiconductor technology has led to a concept of System-on-Chip (SoC). Complexity of modern applications and deep-submicron technologies make low power design attitude compulsory. The higher the level of abstraction of a design at which power optimizations are applied, the higher are potential savings. In this paper we present an overview of some of the design measures to reduce energy consumption of SoCs.

引用

页码：573 / +

页数：2

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