Testability of 2-level AND/EXOR circuits

被引:13
作者
Drechsler, R [1 ]
Hengster, H
Schäfer, H
Hartmann, J
Becker, B
机构
[1] Univ Freiburg, Inst Comp Sci, Freiburg, Germany
[2] Goethe Univ Frankfurt, Dept Comp Sci, Frankfurt, Germany
[3] DACOS Software GmbH, St Ingbert, Germany
来源
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS | 1999年 / 14卷 / 03期
关键词
AND/EXOR; 2-level circuits; random pattern testability; synthesis for testability;
D O I
10.1023/A:1008306002882
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
It is often stated that AND/EXORcircuits are much easier to test than AND/OR circuits. This statement, however, only holds true for circuits derived from restricted classes of AND/EXOR expressions, like positive polarity Reed-Muller and fixed polarity Reed-Muller expressions. For these two classes of expressions, circuits with good deterministic testability properties are known. In this paper we show that these circuits also have good random pattern testability attributes. An input probability distribution is given that yields a short expected test length for biased random patterns. This is the first time theoretical results on random pattern testability are presented for 2-level AND/EXOR circuit realizations of arbitrary Boolean functions. It turns out that analogous results cannot be expected for less restricted classes of 2-level AND/EXOR circuits. We present experiments demonstrating that generally minimized 2-level AND/OR circuits can be tested as easy (or hard) as minimized 2-level AND/EXOR circuits.
引用
收藏
页码:219 / 225
页数:7
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