Genetic algorithm based test scheduling and test access mechanism design for system-on-chips

被引:12
作者
Chattopadhyay, S [1 ]
Reddy, KS [1 ]
机构
[1] Indian Inst Technol Guwahati, Dept Comp Sci & Engg, Gauhati 781039, India
来源
16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS | 2003年
关键词
D O I
10.1109/ICVD.2003.1183160
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
We present a Genetic algorithm (GA) based approach to solve the problems of Test Scheduling and Test Access Mechanism partition for System on Chips. The approach provides highly optimal results, comparable to the Integer Linear Programming formulation of similar problems within very small CPU times. The results of GA based approach are shown to be superior to the heuristic approaches proposed in the literature.
引用
收藏
页码:341 / 346
页数:6
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