A Study of Low-Power Crystal Oscillator Design

被引：0

作者：

Lee, Kin Keung ^{[1
]}

Granhaug, Kristian ^{[1
]}

Andersen, Nikolaj ^{[1
]}

机构：

[1] Novelda AS, N-0484 Oslo, Norway

来源：

2013 NORCHIP | 2013年

关键词：

CMOS; crystal oscillator; low-power; Pierce; RFID;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

UWB backscatter RFID systems require high quality clock signals and crystal oscillator is one of the few candidates. A study of a low-power parallel-mode crystal oscillator for such applications is presented. A 7.8125 MHz Pierce crystal oscillator is realized in a TSMC 90 nm CMOS process. It has a frequency stability of +/- 7 ppm from 0 to 70 degrees C and draws 36 mu W from a 1.2 V supply. The core area excluding pads is 0.021 mm(2).

引用

页数：4

共 7 条

[1] A 2.1-MHz crystal oscillator time base with a current consumption under 500 nA [J].

Aebischer, D ;

Oguey, HJ ;

vonKaenel, VR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (07) :999-1005

[2]

Chee Y. H., 2006, THESIS ITC

[3]

Decarli N., 2012, 2012 IEEE International Conference on Ultra-Wideband (ICUWB2012), P546, DOI 10.1109/ICUWB.2012.6340402

[4]

Niknejad A., 2007, EE242 LECTURE NOTES

[5]

Rajala O., 2010, THESIS

[6]

Statek Corp, TECHNICAL NOTE NO 32

[7]

Vittoz E., 2010, LOW POWER CRYSTAL AN

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