Automatic synthesis of CMOS RF front-ends

被引：0
|
作者：
Tulunay, Gulin [1 ]
Balkir, Sina [1 ]
机构：
[1] Univ Nebraska, Dept Elect Engn, Lincoln, NE 68588 USA
来源：
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
An automatic synthesis tool for RFIC design is demonstrated. The tool incorporates built-in numerical simulators for fast evaluation of the performance metrics. Nonlinearity is modeled using Volterra series method. The tool additionally provides the dimensions of the on-chip inductors along with their values. To validate this approach, a low noise amplifier (LNA) at 900MHz is synthesized using a 0.35 mu m CMOS process. The synthesis results are verified with the simulation data, obtained from Cadence SPECTRE circuit simulator.
引用
收藏
页码：625 / +
页数：2
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