Winner-Take-All Neural Network with Digital Frequency-Locked Loop

被引:0
|
作者
Hikawa, Hiroomi [1 ]
机构
[1] Kansai Univ, Dept Elect & Elect Engn, Suita, Osaka, Japan
关键词
winner takes all neural network; frequency-locked loop; frequency modulated signal; VHDL;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a new winner-take-all neural network (WTANN), in which input vector information is conveyed by frequency-modulated signals, and neuron computation is carried out by digital frequency-locked loops (DFLLs). The DFLL uses direct digital frequency synthesizer (DDS) as its local oscillator. Frequency resolution of signal generated by the DDS is decided by the size of internal register. Winner search operation is implemented by using frequency comparator circuit, and is distributed among all neurons. The proposed WTANN architecture was described in VHDL and its feasibility was verified by VHDL simulations. Preliminary simulation results show that the proposed SOM has good capability in classifying input vectors.
引用
收藏
页码:2517 / 2520
页数:4
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