Sub-10 nm silicon ridge nanofabrication by advanced edge lithography for NIL applications

被引:41
|
作者
Zhao, Yiping [1 ]
Berenschot, Erwin [1 ]
Jansen, Henri [1 ]
Tas, Niels [1 ]
Huskens, Jurriaan [1 ]
Elwenspoek, Miko [1 ]
机构
[1] Univ Twente, MESA Inst Nanotechnol, NL-7500 AE Enschede, Netherlands
关键词
Silicon ridge nano fabrication; Edge lithography; Nanoimprint lithography; FABRICATION; LINES; ARRAYS; STEP;
D O I
10.1016/j.mee.2008.11.067
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new nanofabrication scheme is presented to form stamps useful in thermal nanoimprint lithography (T-NIL). The stamp is created in <1 1 0> single crystalline silicon using a full-wet etching procedure including local oxidation of silicon (LOCOS) and employing an adapted edge lithography technique on top of conventional photolithography. Ridges down to 10 nm in width have been produced. The silicon ridges have no inbuilt stress and are therefore less fragile than previously fabricated oxide ridges. The ridge sample is used as a template in T-NIL and a full 100 mm wafer size imprint has been successfully carried out in both polymethylmethacrylate (PMMA) and mr-I 7020E polymer. Moreover, the imprinted pattern in PMMA is subsequently transferred into a device wafer. (C) 2008 Elsevier B.V. All rights reserved.
引用
收藏
页码:832 / 835
页数:4
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