A Low-Power Sample-and-Hold Circuit Based on a Switched-OpAmp Technique

被引:2
作者
Centurelli, Francesco [1 ]
Simonetti, Andrea [1 ]
Trifiletti, Alessandro [1 ]
机构
[1] Univ Roma La Sapienza, Dipartimento Ingn Elettron, I-00184 Rome, Italy
来源
ICSES 2008 INTERNATIONAL CONFERENCE ON SIGNALS AND ELECTRONIC SYSTEMS, CONFERENCE PROCEEDINGS | 2008年
关键词
Sample-and-Hold; Switched-Opamp; Low power circuits;
D O I
10.1109/ICSES.2008.4673369
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A novel low-power and high-performance sample-and-hold (S/H) front-end suitable for pipelined and cyclic analog-to-digital converters using 0.25-mu m CMOS technology is proposed. This sampler uses a new S/H architecture exploiting a switched telescopic cascode operational transconductance amplifier (OTA) to minimize power consumption. Simulation results show that the proposed solution allows simple and reliable S/H function and an effective power reduction without noise and distortion penalty.
引用
收藏
页码:105 / 108
页数:4
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