Simplified merged processing element for successive-cancellation polar decoder

被引:11
作者
Yun, H. -R. [1 ]
Lee, H. [1 ]
机构
[1] Inha Univ, Dept Informat & Commun Engn, Inchon 22212, South Korea
关键词
codes; forward error correction; switching circuits; adders; simplified merged processing element architectures; successive-cancellation polar decoder; SMPE architectures; sign-magnitude conversion number reduction; switch networks number reduction; decrease hardware complexity; technology scaled normalised throughput improvement; forward error correction codes; CODES;
D O I
10.1049/el.2015.3432
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Novel simplified merged processing element (SMPE) architectures to design a low-complexity successive-cancellation (SC) polar decoder are presented. The proposed SMPE architectures reduce the number of sign-magnitude conversions and switch networks, relative to those of the conventional merged processing element. Synthesis results show that the (1024, 512) SC polar decoder using the proposed SMPE architectures significantly decreases hardware complexity and improves technology scaled normalised throughput, as compared to those of the previously reported architectures.
引用
收藏
页码:270 / 271
页数:2
相关论文
共 6 条
[1]   Channel Polarization: A Method for Constructing Capacity-Achieving Codes for Symmetric Binary-Input Memoryless Channels [J].
Arikan, Erdal .
IEEE TRANSACTIONS ON INFORMATION THEORY, 2009, 55 (07) :3051-3073
[2]   High-Throughput Low-Complexity Successive-Cancellation Polar Decoder Architecture using One's Complement Scheme [J].
Kim, Cheolho ;
Yun, Haram ;
Ajaz, Sabooh ;
Lee, Hanho .
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2015, 15 (03) :427-435
[3]   A Semi-Parallel Successive-Cancellation Decoder for Polar Codes [J].
Leroux, Camille ;
Raymond, Alexandre J. ;
Sarkis, Gabi ;
Gross, Warren J. .
IEEE TRANSACTIONS ON SIGNAL PROCESSING, 2013, 61 (02) :289-299
[4]   Polar Codes: Primary Concepts and Practical Decoding Algorithms [J].
Niu, Kai ;
Chen, Kai ;
Lin, Jiaru ;
Zhang, Q. T. .
IEEE COMMUNICATIONS MAGAZINE, 2014, 52 (07) :192-203
[5]   Low-Latency Successive-Cancellation Polar Decoder Architectures Using 2-Bit Decoding [J].
Yuan, Bo ;
Parhi, Keshab K. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2014, 61 (04) :1241-1254
[6]  
Zang C., 2012, IEEE CIRCUITS SYSTEM, V11, P3471