We report on the fabrication and electrical characterization at room and low temperatures of a tunneling field-effect transistor (TFET). The devices are fabricated in thin germanium-on-insulator and consist of a heavily p(+)-doped, epitaxially grown source, a heavily n(+)-doped ion implanted drain, and a standard high-kappa (HfO(2)) gate stack with an effective gate length L(eff) of 60 nm, obtained by trimming. The TFETs are fabricated using an ultralarge-scale integration compatible process flow. The devices exhibit an ambipolar behavior, reasonable on/off current ratio, and improved on current compared to silicon-on-insulator TFETs.