HIGH THROUGHPUT AND LOW AREA COST FPGA-BASED SIGNATURE MATCH CIRCUIT FOR NETWORK INTRUSION DETECTION

被引：3

作者：

Hwang, Wen-Jyi ^{[2
]}

Ou, Chien-Min ^{[1
]}

Shih, Ying-Nan ^{[2
]}

Lo, Chia-Tien Dan ^{[3
]}

机构：

[1] Ching Yun Univ, Dept Engn, Chungli 320, Taiwan

[2] Natl Taiwan Normal Univ, Dept Comp Sci & Informat Engn, Taipei 117, Taiwan

[3] Univ Texas San Antonio, Dept Comp Sci, San Antonio, TX 78249 USA

来源：

JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS | 2009年 / 32卷 / 03期

关键词：

network intrusion detection system; FPGA implementation; pattern matching;

D O I：

10.1080/02533839.2009.9671520

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

A novel FPGA-based signature match circuit serving as the core of a hardware-based network intrusion detection system (NIDS) is presented in this paper. The circuit is based on simple shift registers and signature decoders for efficient hardware signature matches. As compared with related work, experimental results show that the proposed work achieves high throughput and uses few hardware resources in the FPGA implementations of NIDS systems.

引用

页码：397 / 405

页数：9

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