Analytical Modeling and Simulation of Dual Material Double Gate All Around Tunnel Field Effect Transistor using MATLAB

被引:0
作者
Bharathi, Helen Ramya R. [1 ]
Karthikeyan, P. [1 ]
机构
[1] PSNA Coll Engn & Technol, Dept ECE, Dindigul, Tamil Nadu, India
来源
2017 INTERNATIONAL CONFERENCE ON INNOVATIONS IN INFORMATION, EMBEDDED AND COMMUNICATION SYSTEMS (ICIIECS) | 2017年
关键词
Dual Material Gate TFET (DMG-TFET); Dual Material Double Gate All Around TFET (DMDGAA-TFET); Band to Band Tunneling (BTBT); ON current (I-ON); Subthreshold swing (SS); MOSFETS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
When the measurements of CMOS transistors strike nm extends, the energy consumed by the device increments because of high off state current (IoFF). To diminish IoFF, the Subthreshold Swing (SS) of the device must be decreased. To decrease SS, numerous bearer pumping systems have been recommended. One of the promising less power consumed device is Tunnel Field Effect Transistor (TFET). But in TFET, the on-current (Ion) is extensively low. To expand Ion, numerous Gate Engineering configurations have been recommended. In this paper, an analytical model of Dual Material Double Gate All Around Tunnel Field Effect Transistor (DMDGAA-TFET) is presented. Surface potential and electric flux are analytically modelded by fulfilling 2-D Laplace condition. Here electric flux is utilized to decide the drain current. At last the Ion improvement as well as, the reduced SS is contrasted with Dual Material Gate Tunnel Field Effect Transistor (DMG-TFET) by checking the analytical results with MATLAB results.
引用
收藏
页数:7
相关论文
共 20 条
  • [1] Two-dimensional analytical threshold voltage and subthreshold swing models of undoped symmetric double-gate MOSFETs
    Abd El Hamid, Hamdy
    Guitart, Jaume Roig
    Iniguez, Benjamin
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (06) : 1402 - 1408
  • [2] Modeling of potentials and threshold voltage for symmetric doped double-gate MOSFETs
    Cerdeira, A.
    Moldovan, O.
    Iniguez, B.
    Estrada, M.
    [J]. SOLID-STATE ELECTRONICS, 2008, 52 (05) : 830 - 837
  • [3] Effect of Localized Interface Charge on the Threshold Voltage of Short-Channel Undoped Symmetrical Double-Gate MOSFETs
    Ioannidis, Eleftherios G.
    Tsormpatzoglou, Andreas
    Tassis, Dimitrios H.
    Dimitriadis, Charalabos A.
    Ghibaudo, Gerard
    Jomaah, Jalal
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2011, 58 (02) : 433 - 440
  • [4] Kumar Sunil, 2015, MODELING DG TUNNEL F
  • [5] Analytical model of single-gate silicon-on-insulator (SOI) tunneling field-effect transistors (TFETs)
    Lee, Min Jin
    Choi, Woo Young
    [J]. SOLID-STATE ELECTRONICS, 2011, 63 (01) : 110 - 114
  • [6] A 2-d analytical solution for SCEs in DG MOSFETs
    Liang, XP
    Taur, Y
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (09) : 1385 - 1391
  • [7] Compact model for highly-doped double-gate SOI MOSFETs targeting baseband analog applications
    Moldovan, Oana
    Cerdeira, Antonio
    Jimenez, David
    Raskin, Jean-Pierre
    Kilchytska, Valeria
    Flandre, Denis
    Collaert, Nadine
    Iniguez, Benjamin
    [J]. SOLID-STATE ELECTRONICS, 2007, 51 (05) : 655 - 661
  • [8] Assessment of Ambipolar Behavior of a Tunnel FET and Influence of Structural Modifications
    Narang, Rakhi
    Saxena, Manoj
    Gupta, R. S.
    Gupta, Mridula
    [J]. JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2012, 12 (04) : 482 - 491
  • [9] Priya1 G. Lakshmi, 2014, INT J CHEMTECH RES, V7, P1005
  • [10] Modeling the centroid and the inversion charge in cylindrical surrounding gate MOSFETs, including quantum effects
    Roldan, J. B.
    Godoy, Andres
    Gamiz, Francisco
    Balaguer, M.
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (01) : 411 - 416