Energy-Resolved Soft-Error Rate Measurements for 1-800 MeV Neutrons by the Time-of-Flight Technique at LANSCE

被引：16

作者：

Iwashita, Hidenori ^{[1
]}

Funatsu, Gentaro ^{[1
]}

Sato, Hirotaka ^{[2
]}

Kamiyama, Takashi ^{[2
]}

Furusaka, Michihiro ^{[2
,3
,4
]}

Wender, Stephen A. ^{[5
]}

Pitcher, Eric ^{[5
]}

Kiyanagi, Yoshiaki ^{[6
]}

机构：

[1] Nippon Telegraph & Tel Corp, Tokyo 1808585, Japan

[2] Hokkaido Univ, Fac Engn, Sapporo, Hokkaido 0608628, Japan

[3] Natl Inst Adv Ind Sci & Technol, Tsukuba, Ibaraki 3058568, Japan

[4] High Energy Accelerator Res Org, Tsukuba, Ibaraki 3050801, Japan

[5] Los Alamos Natl Lab, New Mexico, NM 87545 USA

[6] Nagoya Univ, Grad Sch Engn, Nagoya, Aichi 4648603, Japan

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2020年 / 67卷 / 11期

关键词：

Neutrons; Field programmable gate arrays; Semiconductor device measurement; Registers; Energy measurement; Random access memory; Semiconductor devices; Field-programmable gate arrays (FPGAs); neutron radiation effects; particle accelerator; single-event upset (SEU) cross section; time-of-flight (TOF) technique; SRAMS; BULK;

D O I：

10.1109/TNS.2020.3025727

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Problems caused by neutron-induced soft errors in electrical devices are becoming increasingly common in various applications. The neutron-energy-dependent soft-error rate is indispensable for evaluating the frequency of such errors in different neutron fields. We have observed the energy-dependent neutron-induced error rates continuously over the energy range of 1-800 MeV at Los Alamos Neutron Science Center (LANSCE). This was made possible by using extremely fast circuits built into field-programmable gate arrays (FPGAs) for time-of-flight measurement. Current experimental results revealed the overall trend of the error rate, which gradually increases up to 20 MeV. Interestingly, the rate depended on the type of device, and the errors occurred even below the threshold energy of the nuclear cross section of silicon, 2.75 MeV.

引用

页码：2363 / 2369

页数：7

共 28 条

[1] Analysis of Charge Deposition and Collection Caused by Low Energy Neutrons in a 25-nm Bulk CMOS Technology [J].