Matching Performance of FinFET Devices With Fin Widths Down to 10 nm

被引：24

作者：

Magnone, P. ^{[1
]}

Mercha, A. ^{[2
]}

Subramanian, V. ^{[3
]}

Parvais, P. ^{[2
]}

Collaert, N. ^{[2
]}

Dehan, M. ^{[2
]}

Decoutere, S. ^{[2
]}

Groeseneken, G. ^{[2
,4
]}

Benson, J. ^{[5
]}

Merelle, T. ^{[5
]}

Lander, R. J. P. ^{[5
]}

Crupi, F. ^{[1
]}

Pace, C. ^{[1
]}

机构：

[1] Univ Calabria, DEIS Dept, I-87036 Arcavacata Di Rende, CS, Italy

[2] IMEC, B-3001 Louvain, Belgium

[3] IBM India Private Ltd, Bangalore 560045, Karnataka, India

[4] Katholieke Univ Leuven, Dept Elect Engn, B-3001 Louvain, Belgium

[5] NXP Res, B-3001 Louvain, Belgium

来源：

IEEE ELECTRON DEVICE LETTERS | 2009年 / 30卷 / 12期

关键词：

Current-factor fluctuations; FinFET; matching; MuGFET; threshold-voltage fluctuations; IMPACT; ROUGHNESS;

D O I：

10.1109/LED.2009.2034117

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, the matching performances of FinFET devices with high-k dielectric, metal gates, and fin widths down to 10 nm are experimentally analyzed. The stochastic variation of threshold voltage and current factor is examined for both p- and n-type FinFETs. An improvement of the matching performance is expected compared to conventional planar bulk devices since the fins are undoped. The impact of line edge roughness and charge density in the high-k dielectric is evaluated in order to understand which physical parameter fluctuation is dominant on the measured matching parameters.

引用

页码：1374 / 1376

页数：3

共 15 条

[1] Simulation of statistical variability in nano MOSFETs [J].