A New Three Phase Multilevel Inverter Topology with Reduced Number of Switches with Common Mode Voltage Elimination

被引：0
|
作者：
Hota, Arpan [1 ]
Jain, Sachin [1 ]
机构：
[1] Natl Inst Technol Warangal, Dept Elect Engn, Warangal, Andhra Prades, India
来源：
PROCEEDINGS OF THE FIRST IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, INTELLIGENT CONTROL AND ENERGY SYSTEMS (ICPEICES 2016) | 2016年
关键词：
Common Mode Voltage Elimination; 3-phi Multilevel Inverter; Reduced Switching Power Device; FLYING CAPACITOR; SCHEME;
D O I：
暂无
中图分类号：
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号：
0807 ; 0820 ;
摘要：
This paper presents a new topology for a 3-phi, three step multilevel inverter (MLI) with Common Mode Voltage (CMV) elimination. The proposed MLI structure is realized with fewer switching power devices compared to the conventional MLI solutions for CMV elimination. Reduced number of switching power semiconductors results in a smaller amount of driver circuits, less installation space and low cost. Further, due to the elimination of CMV, the proposed MLI is free from issues like EMI and leakage current. Presented topology is compared with other topologies to prove its superiority. Simulation results are presented to confirm the capability of the proposed MLI.
引用
收藏
页数：5
相关论文
共 50 条
  • [31] A new generalized switched diode multilevel inverter topology with reduced switch count and voltage on switches
    Jagabar Sathik, M.
    Prabaharan, N.
    Ibrahim, S. A. A.
    Vijaykumar, K.
    Blaabjerg, Frede
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2020, 48 (04) : 619 - 637
  • [32] A Single-Phase Multilevel Inverter Topology to Synthesize Multiple Number of Levels Using Common Number of Switches
    Waghmare, Manoj A.
    Salodkar, Prachi A.
    Pillewan, Himanshu
    2017 INTERNATIONAL CONFERENCE ON POWER AND EMBEDDED DRIVE CONTROL (ICPEDC), 2017, : 496 - 504
  • [33] GA Based Selective Harmonic Elimination for Multilevel Inverter with Reduced Number of Switches
    Karaca, Hulusi
    Bektas, Enes
    WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE, WCECS 2015, VOL I, 2015, : 204 - 209
  • [34] Novel Asymmetrical Multilevel Inverter Topology with Reduced Number of Switches for Photovoltaic Applications
    Mudadla, Dhananjaya
    Sandeep, N.
    Rao, G. Rama
    2015 INTERNATIONAL CONFERENCE ON COMPUTATION OF POWER, ENERGY, INFORMATION AND COMMUNICATION (ICCPEIC), 2015, : 123 - 128
  • [35] Simulation Analysis of New Multilevel Inverter with Reduced Number of Switches
    Dhivakar, K.
    Thiyagarajan, V
    2018 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENERGY SYSTEMS (ICEES), 2018, : 443 - 448
  • [36] A New Hybrid Asymmetric Multilevel Inverter with Reduced Number Of Switches
    Prabaharan, N.
    Palanisamy, K.
    2016 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES), 2016,
  • [37] A new magnetic linked three-phase multilevel inverter with reduced number of switches and balanced DC sources
    Mondol, Md Halim
    Biswas, Shuvra Prokash
    Hosain, Md Kamal
    ELECTRICAL ENGINEERING, 2022, 104 (02) : 449 - 461
  • [38] A new magnetic linked three-phase multilevel inverter with reduced number of switches and balanced DC sources
    Md. Halim Mondol
    Shuvra Prokash Biswas
    Md. Kamal Hosain
    Electrical Engineering, 2022, 104 : 449 - 461
  • [39] Design and Implementation of a New Three Source Topology of Multilevel Inverters with Reduced Number of Switches
    Vijeh, Mandi
    Samadaei, Emad
    Rezanejad, Mohammad
    Vahedi, Hani
    Al-Haddad, Kamal
    PROCEEDINGS OF THE IECON 2016 - 42ND ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2016, : 6500 - 6505
  • [40] A New Cascaded Multilevel Inverter Topology with Minimum Number of Conducting Switches
    Mohamad, A. Syukri
    Mariun, Norman
    Sulaiman, Nasri
    Radzi, M. Amran M.
    2014 IEEE INNOVATIVE SMART GRID TECHNOLOGIES - ASIA (ISGT ASIA), 2014, : 164 - 169
12345