A 60GHz Variable-Gain LNA in 65nm CMOS

被引:28
作者
Natarajan, Arun [1 ]
Nicolson, Sean [1 ,2 ]
Tsai, Ming-Da [2 ]
Floyd, Brian [1 ,2 ]
机构
[1] IBM Corp, TJ Watson Res Ctr, Yorktown Hts, NY USA
[2] Media Tek, Hsinchu, Taiwan
来源
2008 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE | 2008年
关键词
D O I
10.1109/ASSCC.2008.4708743
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A four-stage 60GHz low-noise amplifier is implemented in 65nm CMOS with nMOS f(t) of 210GHz. The LNA incorporates a reflection-type attenuator to provide variable gain with improved linearity in low-gain mode and a tunable notch filter for image rejection. The LNA, which consists of two common-source stages followed by two cascode stages, consumes 30.8mW and achieves 5.9dB NF and 15dB gain at 60GHz. The variable attenuator provides 10dB of gain variation with the input-referred 1dB compression point of the LNA being -15.1dBm in high gain mode and -6dBm in the low-gain mode. Each tunable notch filter stage provides an additional 8dB attenuation of 37GHz image signals, with the four-stage LNA achieving more than 35dB image-rejection.
引用
收藏
页码:117 / +
页数:2
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