On feasibility of a multiplier-less phase-shifting scheme for digital phase modulation and its VLSI implementation

被引:3
作者
Mahapatra, R. [1 ]
Dhar, A. S. [1 ]
Datta, D. [1 ]
机构
[1] Indian Inst Technol, Dept Elect & Elect Commun Engn, Kharagpur 721302, W Bengal, India
关键词
BPSK; VCO; VLSI; transition-initiated phase acceleration (TIPA); phase acceleration interval (PAI); BER;
D O I
10.1080/00207210601086305
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a multiplier-less phase-shifting scheme for digital phase modulation is proposed and its implemantation for very large-scale integration (VLSI) is examined. The abrupt phase shift of carrier waveform, required after each data transition in digital phase-modulation scheme, is realized by incrementing the frequency of a voltage-controlled oscillator (VCO) for a short duration, immediately following the data transition. The momentary increase in VCO frequency is realized by feeding the VCO with narrow control pulses, derived from the baseband data stream using a simple supporting circuit. This work currently deals with the VLSI design for binary phase-shift keying (BPSK). However, the underlying concept is generic and hence capable of implementing other digital phase-modulation schemes, such as, quadrature PSK (QPSK), quadrature amplitude modulation (QAM) etc, with a programmable control circuit for the VCO. Thus, the proposed multiplier-less phase-shifting scheme can find useful application in broadband wireless networks employing adaptive modulation schemes.
引用
收藏
页码:171 / 181
页数:11
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